head	1.17;
access;
symbols;
locks; strict;
comment	@-- @;
 
 
1.17
date	99.07.28.14.55.42;	author ryu;	state Exp;
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next	1.16;
 
1.16
date	99.01.14.10.18.22;	author ryu;	state Exp;
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1.15
date	99.01.13.07.25.40;	author ryu;	state Exp;
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1.14
date	98.09.12.19.54.34;	author ryu;	state Exp;
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1.13
date	98.09.08.12.28.50;	author ryu;	state Exp;
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1.12
date	98.09.01.04.26.37;	author ryu;	state Exp;
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1.11
date	98.08.30.19.23.36;	author ryu;	state Exp;
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1.10
date	98.08.29.17.28.35;	author ryu;	state Exp;
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1.9
date	98.08.24.00.49.12;	author ryu;	state Exp;
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1.8
date	98.08.23.22.11.09;	author ryu;	state Exp;
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1.7
date	98.08.18.09.32.38;	author ryu;	state Exp;
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1.6
date	98.08.17.16.58.46;	author ryu;	state Exp;
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1.5
date	98.08.17.04.25.40;	author ryu;	state Exp;
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1.4
date	98.08.17.02.39.18;	author ryu;	state Exp;
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1.3
date	98.08.16.13.40.46;	author ryu;	state Exp;
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1.2
date	98.08.16.11.58.20;	author ryu;	state Exp;
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1.1
date	98.08.15.18.24.07;	author ryu;	state Exp;
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next	;
 
 
desc
@Added variables for setup/hold characterization
@
 
 
1.17
log
@checking in
@
text
@#	$Id: setup_hold.spec,v 1.16 1999/01/14 10:18:22 ryu Exp ryu $
 
#	Copyright (C) 1999 Robert K. Yu
#	email: robert@@yu.org
 
#	This file is part of Autochar.
 
#	Autochar is free software; you can redistribute it and/or modify
#	it under the terms of the GNU General Public License as published by
#	the Free Software Foundation; either version 2, or (at your option)
#	any later version.
 
#	Autochar is distributed in the hope that it will be useful,
#	but WITHOUT ANY WARRANTY; without even the implied warranty of
#	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
#	GNU General Public License for more details.
 
#	You should have received a copy of the GNU General Public License
#	along with Autochar; see the file COPYING.  If not, write to the
#	Free Software Foundation, Inc., 59 Temple Place - Suite 330,
#	Boston, MA 02111-1307, USA.
 
#------	SETUP/HOLD TIME CHARACTERIZATION ---------------------------------------
 
 
#-------------------------------------------------------------------------------
#	The syntax are the same as the Perl language.  Any
#	valid Perl expression can be used.  In fact, this file is
#	executed directly, so the order of the definitions is
#	important:  Be sure the '&autochar' command, which is actually
#	a subroutine call to the function 'autochar', is called after
#	the necessary definitions are made.
#-------------------------------------------------------------------------------
 
# Any of the global defaults may be changed here.  See
# $AUTOCHAR/lib/defaults.pl for a list of what they are.
 
# $spice_cmd		= 'hspice';
# $techpath		= '/path/to/spice/libraries';
# $spice_corner		= 'hspice.ttlh';
# $spice_include	= '.include /some/special/include.file';
# $scale_cload		= 0.66e-15;
# $scale_delay		= 0.060e-9;
# $trans_period		= '2ns';
# etc.
 
 
#-------------------------------------------------------------------------------
# Specify the characterization type.
 
$sim_type	= 'setup_hold';
 
 
#-------------------------------------------------------------------------------
# Specify the name of the spice subckt and the file containing
# the spice subckt.
 
$cellname	= 'dff';
$spice_netlist	= 'dff.sp';
 
 
#-------------------------------------------------------------------------------
# List of the terms to the cell.  Order is unimportant.
# Each name is prefixed by a ":x" letter to indicate type:
#	:i	= input
#	:o	= output
#	:b	= biput
#	:v	= vdd supply
#	:g	= gnd
 
# Declare the list manually
@@termlist	= (
    'd:i',
    'clk:i',
    'q:o',
);
 
 
# Alternatively, get the term definition from other netlist.
# @@termlist	= &read_spice_terms ("filename", $cellname);
 
 
#-------------------------------------------------------------------------------
# Vary the slewrate of the input clock.
# @@slewrate	= &vary_list(<start>, <incr>, <N>, <units>);
# @@slewrate	= &vary_list(500, 200, 3, '');
 
# Or specify the explicit list of slewrate values
# @@slewrate	= (0.66667, 1.33333, 2, 2.66667, 5.3333);
 
 
#-------------------------------------------------------------------------------
# Define input buffers.  The name of the buffer is a two-port subckt
# that will be placed between the input pulse source and the input
# term being characterized.  Typically, this is a buffer of some sort.
# If 'none' is specified, then no buffer will be added.
 
$buffer{'d'}		= 'buf';
$buffer{'clk'}		= 'buf';
# $buffer{'in3'}	= 'none';
 
# Define any special differential inputs.  For example,
# in0 and in1 are defined as a differential input pair,
# with in1 being the reference.
# $differential{'in0'}	= 'in1';
 
# Define any special equivalent inputs.  For example,
# in0 and in1 are defined as a equivalent input pair,
# with in1 being the reference.
# $equivalent{'in0'}	= 'in1';
 
 
#-------------------------------------------------------------------------------
# Define the output loads.
 
# Specify the loads for the output(s) that are not being characterized.
# If 'none' is specified, then no output loading is added.  Use
# the words 'cap:', 'res:', or 'subckt:' to indicate an output load that
# is an ideal capacitor, an ideal resistor, or a one-port spice subckt.
 
$load{'default'}	= 'none';
$load{'q'}		= 'cap:10ff';
# $load{'out1'}		= 'cap:10ff'; 
# $load{'out1'}		= 'res:1K'; 
# $load{'out1'}		= 'subckt:buf_4x'; 
 
 
#-------------------------------------------------------------------------------
# Define the setup and hold constraints.
 
# Define the percentage to use to determine pass/fail:
# if the voltage of the internal node is >= the specified percentage
# of its final value, then it is said to be passing.  If
# it is < the given percentage of its final value, then
# it is said to be failing.  The measurement of the internal
# node is made when the clock is at the specified percent
# of its final value.
$criterion_percent	= 0.8;
$clock_percent		= 0.8;
 
if ($spice_type eq 'smartspice') {
 
    # Specify the initial window size, and the number of iterations
    # this window is stepped in order to find the initial passing
    # and failing boundaries.  Typically in picoseconds.
    window		= 1000;
    iterations		= 20;
 
    # Specify the max resolution of the characterization.  Once
    # the window is sized below this value, characterization is
    # stopped.
    resolution		= 5;
 
    # Setup and hold values must be specified as integers
    # (due to smartspice implementation reasons).  The actual values
    # is scaled by this value.  Typcically 1e-12 is used for picoseconds.
    setup_hold_scale	= '1e-12';
 
} else {
 
    # default hspice:
 
    # Define the relative input parameter variation
    # and relative output results function variance for convergence.
    # See the hspice 'Optimization' chapter for details.
    $relin		= 0.001;
    $relout		= 0.001;
 
    # Define the range of minimum and maximum setup values allowed.
    # Setup time is defined positive before the clock.
    @@setup_range		= ('0', '1ns');
 
    # Define the range of minimum and maximum hold values allowed.
    # Hold time is defined positive after the clock.
    @@hold_range		= ('0', '1ns');
 
}
 
 
 
#-------------------------------------------------------------------------------
# Characterization command.  The general form is:
#	&autochar ( <d>, <clktype>, <clk>, <qtype>, <q>, <ctype>, <c>, [ <tie>, <unused>+] );
#
#	<d>		= name of the flop data input term
#	<clktype>	= either 'rising' or 'falling' clock edges
#	<clk>		= name of the flop clock term
#	<qtype>		= either 'inverting' or 'non_inverting' w.r.t. d
#	<q>		= name of the flop data output term
#	<ctype>		= either 'inverting' or 'non_inverting' w.r.t. d
#	<c>		= name of the internal criterion node
#
#	Optional:
#	<tie>	= how to tie the other inputs, either 'tie_high' or 'tie_low'
#	<unused>= name(s) of the inputs to be tied.  These are regular
#		  perl expresssions.  Be sure to write brackets [ and ]
#		  as \[ and \], respectively.  < and > are ok.
#
 
# characterize all inputs
&autochar ('d', 'rising', 'clk', 'non_inverting', 'q', 'inverting', 'n10');
 
 
#-------------------------------------------------------------------------------
# In some cases, it is desirable to skip the characterization of certain arcs
# and to copy the data from another set of arcs instead.  The general form is:
#	&copychar (<d>, <clktype>, <clk>, <refd>, <refclk>);
 
# &copychar ('d', 'falling', 'ph1_b', 'd', 'ph1');
 
 
# Must return a value to make perl happy.
1;
@
 
 
1.16
log
@Using /usr/bin/perl
@
text
@d1 1
a1 3
#! /usr/bin/perl
 
#	$Id: setup_hold.spec,v 1.15 1999/01/13 07:25:40 ryu Exp ryu $
a130 6
# Define the relative input parameter variation
# and relative output results function variance for convergence.
# See the hspice 'Optimization' chapter for details.
$relin		= 0.001;
$relout		= 0.001;
 
d141 38
a178 7
# Define the range of minimum and maximum setup values allowed.
# Setup time is defined positive before the clock.
@@setup_range		= ('0', '1ns');
 
# Define the range of minimum and maximum hold values allowed.
# Hold time is defined positive after the clock.
@@hold_range		= ('0', '1ns');
@
 
 
1.15
log
@GPL
@
text
@d1 1
a1 1
#! /usr/local/bin/perl
d3 1
a3 1
#	$Id$
@
 
 
1.14
log
@Simplified parameters; got rid of @@init, @@trans
@
text
@d3 1
a3 5
#	Copyright (c) 1998-2001, Robert K. Yu.  All Rights Reserved.
#
#	No part of this program may be used, reproduced, stored in a 
#	retrieval system, or transmitted in any form or by any 
#	means without the prior permission of the author.
d5 2
a6 3
#	$Id: setup_hold.spec,v 1.13 1998/09/08 12:28:50 ryu Exp ryu $
#	Autochar Specification File
#	Author: Robert K. Yu
d8 16
@
 
 
1.13
log
@copyright notice
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.12 1998/09/01 04:26:37 ryu Exp ryu $
d29 7
a35 7
# $init{'spice_cmd'}	= 'hspice';
# $init{'techpath'}	= '/path/to/spice/libraries';
# $init{'corner'}	= 'hspice.ttlh';
# $init{'include'}	= '.include /some/special/include.file';
# $init{'scale_cload'}	= 0.66e-15;
# $init{'scale_delay'}	= 0.060e-9;
# $trans{'period'}	= '2ns';
d72 9
a80 1
# @@termlist	= &read_verilog_terms ("filename", $cellname);
@
 
 
1.12
log
@read_spice_terms
@
text
@d3 1
a3 1
#	Copyright (c) 1998, Robert K. Yu.  All Rights Reserved.
d9 1
a9 1
#	$Id: setup_hold.spec,v 1.11 1998/08/30 19:23:36 ryu Exp ryu $
@
 
 
1.11
log
@Renamed port to term
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.10 1998/08/29 17:28:35 ryu Exp ryu $
d70 2
a71 1
# Alternatively, get the term definition from verilog netlist.
@
 
 
1.10
log
@1.3
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.9 1998/08/24 00:49:12 ryu Exp ryu $
d54 1
a54 1
# List of the ports to the cell.  Order is unimportant.
d63 1
a63 1
@@portlist	= (
d70 2
a71 2
# Alternatively, get the port definition from verilog netlist.
# @@portlist	= &read_verilog_ports ("filename", $cellname);
d77 1
a77 1
# port being characterized.  Typically, this is a buffer of some sort.
d142 1
a142 1
#	<d>		= name of the flop data input port
d144 1
a144 1
#	<clk>		= name of the flop clock port
d146 1
a146 1
#	<q>		= name of the flop data output port
@
 
 
1.9
log
@Added copychar syntax
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.8 1998/08/23 22:11:09 ryu Exp ryu $
d166 1
a166 1
# &copychar ('D', 'falling', 'PH1_B', 'D', 'PH1');
@
 
 
1.8
log
@Robert K. Yu
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.7 1998/08/18 09:32:38 ryu Exp ryu $
d159 8
@
 
 
1.7
log
@Changed default corner.
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.6 1998/08/17 16:58:46 ryu Exp ryu $
d11 1
a11 1
#	Author: Robert Yu
@
 
 
1.6
log
@Clean up Clock_Q module
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.5 1998/08/17 04:25:40 ryu Exp ryu $
d31 1
a31 1
# $init{'corner'}	= 'hspice.tthl';
@
 
 
1.5
log
@Added clock_percent
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.4 1998/08/17 02:39:18 ryu Exp ryu $
a136 3
# Define the range of minimum pulse width.
@@min_pulse_width_range	= ('0', '2ns');
 
d154 1
a154 1
#		  as \[ and \], respectively.
@
 
 
1.4
log
@Using hspice's bisect method.
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.3 1998/08/16 13:40:46 ryu Exp ryu $
d123 3
a125 1
# it is said to be failing.
d127 1
@
 
 
1.3
log
@checking in work in progress
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.2 1998/08/16 11:58:20 ryu Exp ryu $
d56 5
a60 5
#	.i	= input
#	.o	= output
#	.b	= biput
#	.v	= vdd supply
#	.g	= gnd
d113 5
a117 4
# Define the error tolerance value between successive
# test values.  Characterization will stop when the
# difference between successive values is <= tolerance.
$tolerance		= '10ps';
d143 1
a143 1
#	<clktype>	= either 'rise' or 'fall' clock edges
d158 1
a158 1
&autochar ('d', 'rise', 'clk', 'non_inverting', 'q', 'inverting', 'n10');
@
 
 
1.2
log
@changed syntax.
@
text
@d9 1
a9 1
#	$Id: setup_hold.spec,v 1.1 1998/08/15 18:24:07 ryu Exp ryu $
d118 7
d139 1
a139 1
#	&autochar ( <d>, <clktype>, <clk>, <qtype>, <q>, [ <tie>, <unused>+] );
d142 1
d144 1
a144 1
#	<clktype>	= either 'rise' or 'fall' clock edges
d146 2
a147 1
#	<qtype>		= either 'inverting' or 'non_inverting'
d157 1
a157 1
&autochar ('d', 'rise', 'clk', 'non_inverting', 'q');
@
 
 
1.1
log
@Initial revision
@
text
@d9 1
a9 1
#	$Id: input_cap.spec,v 1.2 1998/08/15 09:22:19 ryu Exp $
d126 3
d132 1
a132 1
#	&autochar ( <d>, <clk>, <q>, [ <tie>, <unused>+] );
d134 5
a138 3
#	<d>	= name of the flop data input port
#	<clk>	= name of the flop clock port
#	<q>	= name of the flop data output port
d148 1
a148 4
&autochar ('d', 'clk', 'q');
 
# characterize certain inputs
# &autochar ('in1', tie_high, '.*');
@