head	1.6;
access;
symbols;
locks; strict;
comment	@# @;


1.6
date	99.01.30.21.06.48;	author ryu;	state Exp;
branches;
next	1.5;

1.5
date	99.01.28.07.01.54;	author ryu;	state Exp;
branches;
next	1.4;

1.4
date	99.01.21.08.11.40;	author ryu;	state Exp;
branches;
next	1.3;

1.3
date	99.01.21.08.11.15;	author ryu;	state Exp;
branches;
next	1.2;

1.2
date	99.01.21.06.53.55;	author ryu;	state Exp;
branches;
next	1.1;

1.1
date	99.01.21.06.33.52;	author ryu;	state Exp;
branches;
next	;


desc
@*	$Id$
@


1.6
log
@Changed sizes
@
text
@*	$Id: dff_2x.sp,v 1.5 1999/01/28 07:01:54 ryu Exp ryu $

.subckt xgate out in gaten gatep
+	wp=4
+	wn=2
m0 in gatep out vdd pch l=0.35 w=wp
m1 in gaten out gnd nch l=0.35 w=wn
.ends

.subckt inv out in
+	wp=12
+	wn=6
m0 out in gnd gnd nch l=0.35 w=wn
m1 out in vdd vdd pch l=0.35 w=wp
.ends

.subckt dff_2x q d clk clk_n
* Begin port declarations
* port output q
* port input d
* port input clk
* port input clk_n
* End port declarations
x1 min d clk_n clk xgate
x2 min mout inv wp=2 wn=1
x3 mout min inv
x4 s mout clk clk_n xgate
x5 s s_n inv wp=2 wn=1
x6 s_n s inv
x7 q s inv
cmin min gnd 5fF
cmout mout gnd 5fF
cs s gnd 5fF
cs_n s_n gnd 5fF
.ends
@


1.5
log
@lower case
@
text
@d1 1
a1 1
*	$Id: dff_2x.sp,v 1.4 1999/01/21 08:11:40 ryu Exp ryu $
d4 2
a5 2
+	wp=10.0
+	wn=5.0
d11 2
a12 2
+	wp=10
+	wn=5
@


1.4
log
@*** empty log message ***
@
text
@d1 1
a1 1
*	$Id: dff_2x.sp,v 1.3 1999/01/21 08:11:15 ryu Exp ryu $
d3 1
a3 1
.subckt XGATE out in gaten gatep
d10 1
a10 1
.subckt INV out in
d17 1
a17 1
.subckt DFF_2X q d clk clk_n
d24 7
a30 7
x1 min d clk_n clk XGATE
x2 min mout INV wp=2 wn=1
x3 mout min INV
x4 s mout clk clk_n XGATE
x5 s s_n INV wp=2 wn=1
x6 s_n s INV
x7 q s INV
@


1.3
log
@typo
@
text
@d1 1
a1 1
*	$Id: dff_2x.sp,v 1.2 1999/01/21 06:53:55 ryu Exp ryu $
d13 2
a14 2
mb2 out in gnd gnd nch l=0.35 w=wn
mb1 out in vdd vdd pch l=0.35 w=wp
@


1.2
log
@simple dff
@
text
@d1 1
a1 1
*	$Id: dff_2x.sp,v 1.1 1999/01/21 06:33:52 ryu Exp ryu $
d6 2
a7 2
m0 in gatep out vdd pmos l=0.35 w=wp
m1 in gaten out gnd nmos l=0.35 w=wn
d13 2
a14 2
mb2 out in gnd gnd nmos l=0.35 w=wn
mb1 out in vdd vdd pmos l=0.35 w=wp
d17 1
a17 1
.subckt DFF q d clk clk_n
d24 3
a26 3
x1 clk_n min d clk_n clk XGATE
x2 min mout INV
x3 mout min INV wp=2 wn=1
@


1.1
log
@entered into RCS
@
text
@d1 1
a1 1
*	$Id$
d3 5
a7 3
.subckt XGATE control in n_control out 
m0 in n_control out vdd pmos l=0.35 w=3.4
m1 in control out gnd nmos l=0.35 w=3.4
d10 5
a14 6
.subckt INV  in out
+	wp=9.6
+	wn=4
+	l=0.35
mb2 out in gnd gnd nmos l=l w=wn
mb1 out in vdd vdd pmos l=l w=wp
d17 18
a34 16
.subckt DFF clk d clk_n q 
Xi64  clk_n net46 clk net36 XGATE
Xi66  clk_n net38 clk net39 XGATE
Xi65  clk nq clk_n net36 XGATE
Xi62  clk d clk_n net39 XGATE
Xi60  net722 nq INV
Xi63  nq q INV
Xi61  net46 net38 INV
Xi59  net36 net722 INV
Xi58  net39 net46 INV
c20 net36 gnd c=17.09f
c15 net39 gnd c=15.51f
c12 net46 gnd c=25.78f
c4 nq gnd c=25.28f
c3 net722 gnd c=19.48f
c16 net38 gnd c=16.48f
@